摘要:
为了设计功率集成电路所需的低功耗横向功率器件,提出了一种具有阶梯氧化层折叠硅横向双扩散金属-氧化物-半导体(step oxide folding LDMOS, SOFLDMOS)新结构.这种结构将阶梯氧化层覆盖在具有周期分布的折叠硅表面,利用阶梯氧化层的电场调制效应,通过在表面电场分布中引入新的电场峰而使表面电场分布均匀,提高了器件的耐压范围,解决了文献提出的折叠积累型横向双扩散金属-氧化物-半导体器件击穿电压受限的问题.通过三维仿真软件ISE分析获得, SOFLDMOS 结构打破了硅的极限关系,充分利用了电场调制效应、多数载流子积累和硅表面导电区倍增效应,漏极饱和电流比一般LDMOS提高3.4倍左右,可以在62 V左右的反向击穿电压条件下,获得0.74 m?·cm2超低的比导通电阻,远低于传统LDMOS相同击穿电压下2.0 m?·cm2比导通电阻,为实现低压功率集成电路对低功耗横向功率器件的要求提供了一种可选的方案.
Abstract:
In order to design the power devices with the low loss required for the power integrated circuits (PIC), a new folded silicon LDMOS with the folding step oxide layer (SOFLDMOS) is proposed in this paper for the first time. In this structure, the step oxide layer is covered on the folded silicon surface with a periodic distribution. The surface electric field is optimized to be uniform by introducing a new electric field peak due to the electric field modulation effect by the step oxide layer. The breakdown voltage is improved to solve the breakdown voltage limitation problem in FALDMOS. Obtained in virtue of the ISE simulation are the results that the silicon limit is broken by applying the effects of the electric field modulation, accumulation of majority carriers, and conductive silicon region multiplier in the proposed SOFLDMOS. The saturation current of the drain electron is increased by about 3.4 times compared with that of the conventional LDMOS. When the breakdown voltage is 62 V, an ultra-low specific on-resistance of 0.74 m?·cm2 is obtained, which is far less than 2.0 m?·cm2 in the conventional LDMOS with the same breakdown voltage. The low loss requirements is achieved for the PIC with the low voltage region by the proposed SOFLDMOS.
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